Siemens NAN 67 Series Manual de Serviço descarregar pdf (Página 253)

A-3

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

Table A-1 Ladder Logic Instructions Arranged Alphabetically by International Name, with Short Names, cont.

Full Name Page No.Short Name

Jump-If-Not –––(JMPN) 18-5

Jump –––(JMP) 18-3

Master Control Relay Activate –––(MCRA) 20-9

Master Control Relay Deactivate –––(MCRD) 20-9

Master Control Relay Off –––(MCR>) 20-12

Master Control Relay On –––(MCR<) 20-12

Midline Output –––(#)––– 8-6

Multiply Double Integer MUL_DI 11-7

Multiply Integer MUL_I 11-6

Multiply Real MUL_R 12-5

Negate Real Number NEG_R 14-14

Negated Exception Bit BR Memory BR –––|/|––– 19-3

Negated Exception Bit Overflow OV –––|/|––– 19-7

Negated Exception Bit Overflow Stored OS –––|/|––– 19-9

Negated Exception Bit Unordered UO –––|/|––– 19-6

Negated Result Bit Equal 0 ==0 –––|/|––– 19-4

Negated Result Bit Greater Equal 0 >=0 –––|/|––– 19-4

Negated Result Bit Greater Than 0 >0 –––|/|––– 19-4

Negated Result Bit Less Equal 0 <=0 –––|/|––– 19-4

Negated Result Bit Less Than 0 <0 –––|/|––– 19-4

Negated Result Bit Not Equal 0 <>0 –––|/|––– 19-4

Negative RLO Edge Detection –––( N )––– 8-20

Normally Closed Contact (Address) –––|/|––– 8-4

Normally Open Contact (Address) –––| |––– 8-3

Off-Delay S5 Timer S_OFFDT 9-13

Off-Delay Timer Coil –––( SF ) 8-18

On-Delay S5 Timer S_ODT 9-9

On-Delay Timer Coil –––( SD ) 8-16

ONEs Complement Double Integer INV_DI 14-11

ONEs Complement Integer INV_I 14-10

Open Data Block: DB or DI –––( OPN ) 17-2

Output Coil –––( ) 8-5

Positive RLO Edge Detection –––( P )––– 8-19

Pulse S5 Timer S_PULSE 9-5

Pulse Timer Coil –––( SP ) 8-14

Reset Coil –––( R ) 8-10

Reset-Set Flipflop RS 8-24

Result Bit Equal 0 ==0 –––| |––– 19-4

Result Bit Greater Equal 0 >=0 –––| |––– 19-4

Result Bit Greater Than 0 >0 –––| |––– 19-4

Alphabetical Listing of Instructions

1 2 ... 248 249 250 251 252 253 254 255 256 257 258 ... 317 318

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Siemens NAN 67 Series Manual de Serviço Página 253

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