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10-7

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

10.4 Down Counter

A positive edge (that is, a change in signal state from 0 to 1) at input S of the

Down Counter instruction sets the counter with the value at the Preset Value

(PV) input. With a positive edge, the counter is reset at input R. The resetting

of the counter sets the count value to 0. With a positive edge, the value of the

counter at the input is reduced by 1 when the count value is greater than 0. A

signal state check for 1 at output Q produces a result of 1 when the count is

greater than 0; the check produces a result of 0 when the count is equal to 0.

Certain restrictions apply to the placement of the counter boxes (see

Section 6.1).

Table 10-5 Down Counter Box and Parameters, with International Short Name

LAD Box Parameter Data Type Memory Area Description

no. COUNTER C

Counter identification number. The range

depends on the CPU.

C no.

SCD

CD BOOL I, Q, M, D, L

Count down input CD

QCD

S BOOL I, Q, M, D, L

Set input for presetting counter

QCD

PV WORD I, Q, M, D, L

Value in the range of 0 to 999 for

presetting counter (entered as

C#<value> to indicate BCD format)

CV_BCD

R BOOL I, Q, M, D, L

Reset input

Q BOOL I, Q, M, D, L

Status of the counter

CV WORD I, Q, M, D, L

Current counter value (integer format)

CV_BCD WORD I, Q, M, D, L

Current counter value (BCD format)

Description

Counter Instructions

1 2 ... 138 139 140 141 142 143 144 145 146 147 148 ... 317 318

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