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19-6

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

19.4 Exception Bits Unordered

You can use the Exception Bit Unordered instruction to check whether or not

the result of a floating-point math function is unordered (that is, if one of the

values in the math function is not a valid floating-point number). Therefore,

the condition code bits of the status word (CC 1 and CC 0, see Section 6.3)

are evaluated. If the result of the math function is unordered (UO) the signal

state check produces a result of 1. If the combination in CC 1 and CC 0 does

not indicate unordered, the result of the signal state check is 0.

When used in series, this instruction combines the result of its check with the

previous result of logic operation (RLO, see Section 6.3) according to the

And truth table (see Section 6.2 and Table 6-8). When used in parallel, this

instruction combines the result of its check with the previous RLO according

to the Or truth table (see Section 6.2 and Table 6-9).

Figure 19-5 Exception Bit Unordered Element and Its Negated Form

Status Word Bits

BR CC 1 CC 0 OV OS OR STA RLO FC

Write – – – – – x x x 1

I 0.0

If the signal state at input I 0.0 is 1, the

DIV_R box is activated. If the value of either

input double word ID0 or ID4 is not a valid

floating-point number, the floating-point

math function is unordered. If the signal

state of EN is 1 (activated) and an error

occurs while the instruction is being

executed, the signal state of ENO is 0.

Output Q 4.0 is set if the function DIR_V is

executed, but one of the values in the math

function is not a valid floating-point number.

If the signal state of input I 0.0 is 0 (not

activated), the signal state of both EN and

ENO is 0.

DIV_R

IN1

OUT

EN ENO

IN2

ID0

ID4 MD10

Q 4.0

Figure 19-6 Exception Bit Unordered

Description

The Element and

Its Negated Form

Status Bit Instructions

1 2 ... 225 226 227 228 229 230 231 232 233 234 235 ... 317 318

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