
DSB75 Development Support Board Rev. B1 Hardware Description
Strictly confidential / Released
s
DSB75_hd_v08 Page 90 of 94 29.09.2005
CCGND
CCGND
CCGND
SIM
X503
GND
CCDET1
CCDET2
CCRST
CCCLK
CCIO
CCVPP
CCVCC
X500
1
5
6
3
2
4
7
8
12
CCGND
CCRST
CCCLK
CCIO
CCIN
VSIM
C513
100P
C521
220N
C5221N
GND GND GND
R557 R555
GND GND
R556
1K
1K
0R
1K
1U
NB_R558
C552
1U
C551
X562
X560
2
2
1
1
DAC_OUT
X561
21
R551
R552
100R
100R
X551
X552
2
2
3
3
1
1
AD1_IN
AD2_IN
VDD
V500
FDG313N
R502
3K3
R507
3K3
TP502
TP501
R503
3K3
5V0
4
3
562
1
V501
FDG313N
3
4
652
1
R508
3K3
VDD
100R
100R
R510
R509
I2C_CLK_5V
I2C_CLK_3V
I2C_DAT_5V
I2C_DAT_3V
I2C_CLK_5V
I2C_DAT_5V
VDD
VDD
5V0
SPI2_DO
SPI2_D1
SPI2_CS
SPI2_SCLK
GPIO7_SPI
GPIO8_SPI
I2C_CLK_3V
I2C_DAT_3V
I2C_CLK_3V
I2C_DAT_3V
GNDGNDGND
X510
X511
1
2
3
4
5
6
7
8
X501
12
34
56
78
910
1
3
5
7
9
2
4
6
8
10
VEXT
R554
100R
X554
1
3
2
SYNC
VDD
V502
47K
R561
BC857S/UMT1N
R563
220R
R562
47K
220R
R560
V503
GND
V504
LGT679-CO
5
4
6
12
2
3
1
1
2
E2C2
B2
C1E1
B1
VDD
GND
0R
R511
S500
GND
I2CCLK
33P
NB_C510
2
2
3
3
1
1
S501
0R
R512
I2CDAT
33P
GND
NB_C511
D500
3
5
6
8
1
2
7
4
VCC
E0
E1
E2
WC
VSS
SDA
SCL
AT24C128N-10SI-2.7
GND
GND
S504
S503
S502
100N
C550
2
2
2
3
3
3
1
1
1
GND GND
X505
HIROSE
50 Ohm
ANTENNA
X506
SMA
1-POL
11
234
2
3
4
5
NB = not mounted
DSB75
B1
SCHEMATIC
TOP HIERARCHY LEVEL
1:1
sheet5
DATE
USER
APPR'D
06.07.2004
Siemens AG
E
D
C
B
A
10
9
87
654321
A
SIM
B
C
D
E
Figure 55: Schematic sheet 5 – SIM card, I2C, SPI, analog and antenna interface
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