
Semiconductor Group 5 - 11
On-Chip Peripheral Components
Table 5-3, Configurations for Concurrent Compare Mode and Compare Mode 2 at P5
The other combinations are reserved and must not be used.
COCAH4 COCAL4 COCOEN1 COCOEN0 Function of CC4 Function of Compare
Modes at P5
00 0 0
00 1 0
Compare / Capture
disabled
Compare / Capture
disabled
Disabled
Compare mode 2
selected, but only
interrupt generation
(ICR, ICS); no output
signals
0 0 1 1 Compare / Capture
disabled
Compare Mode 2
selected at P5
01 0 0
01 1 0
Capture on falling/
rising edge at pin
P1.4/INT2
/CC4
–
Disabled
Compare modes 2
selected, but olny
interrupt generation
(ICR, ICS); no output
signals at P5
10 0 0
10 0 1
10 1 0
10 1 1
Compare enable at
CC4; Mode
0
/
1
is
selected by COM0
Compare mode 1
enabled at CC4;
COM0 is
automatically set
Compare enable at
CC4; mode
0
/
1
is
selected by COM0
Compare mode 1 en-
abled at CC4; COM0
is automatically set
Disabled
Concurrent compare
(mode 1) selected at
P5
Compare mode 2
selected, but only
interrupt generation
(ICR, ICS); no output
signals at P5
Compare Mode 2
selected at P5
11 0 0
11 1 0
Capture on write
operation into register
CCL4
Capture on write
operation into register
CCL4
Disabled
Compare mode 2
selected, but only
interrupt generation
(ICR, ICS); no output
signals at P5
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