
Device Specification
Semiconductor Group 7-52
Table 8
Status of all pins during Idle Mode, Power Down Mode and Hardware Power
Down Mode
Pins Idle Mode
Last instruction
executed from
Power Down Mode
Last instruction
executed from
Hardware Power Down
internal
ROM
external
ROM
internal
ROM
external
ROM
Status Voltage range
at pin
P0 Data float Data float
P1 Data alt
outputs
Data alt
outputs
Data last
outputs
Data last
outputs
floating
P2 Data Address Data Data output
P3 Data alt
outputs
Data alt
outputs
Data
last output
Data
last output
outputs
P4 Data alt
outputs
Data alt
outputs
Data last
outputs
Data
last output
disabled V
SS
≤ V
IN
≤
V
CC
P5 Data
alt output
Data
alt output
Data
last output
Data
last output
input
P6 Data
alt output
Data
alt output
Data
last output
Data
last output
function
P7
P8
EA active input V
IN
= V
CC
or
V
IN
= V
SS
PE/SWD active input
pull-up
disabled
V
IN
= V
CC
or
V
IN
= V
SS
XTAL1 active output pin may not be
driven
XTAL2 disabled
input
functions
V
SS
≤V
IN
≤
V
CC
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